Pi5帽子上的AMD Xilinx Artix 50T FPGA，具有PCIe和GPIO互连以及SPI编程
An AMD Xilinx Artix 50T FPGA on a Pi5 Hat with PCIe and GPIO interconnects as well as SPI programming (2024-03-25, Verilog, 0KB, 下载0次)
Pygmy是一种微型RISC-V可编程微控制器，用于完全用Verilog HDL设计的嵌入式FPGA应用
Pygmy is a tiny RISC-V programmable microcontroller for embedded FPGA applications designed entirely in Verilog HDL (2024-03-25, Verilog, 0KB, 下载0次)
电气软件中CPL_Full_Adder的原理图和布局设计。使用verilog编程在ModelSim软件中进行模拟。，
Schematic and Layout design of CPL_Full_Adder in Electric software. Simulations in ModelSim software using verilog programming., (2023-09-27, Verilog, 0KB, 下载0次)
首次尝试FPGA和verilog编程。在Xilinx板上实现的移位寄存器芯片74HC595的驱动程序设计。，
First attempt on FPGA & verilog programming. A driver design for shift register chip 74HC595 implemented on Xilinx board., (2021-04-04, Verilog, 0KB, 下载0次)
一种使用Verilog HDL编程的简单算术计算器，在Basys3板上实现，用于CSCE2301（数字设计I）课程，即...，
A simple arithmetic calculator programmed using Verilog HDL, implemented on a Basys3 board, for the CSCE2301 (Digital Design I) course, in Spring 2022. (2022-06-10, Verilog, 0KB, 下载0次)
关于Verilog硬件描述系统中现场可编程门阵列（FPGA）模型应用程序设计的课程和项目...，
Coursework and projects regarding the design of field programmable gate arrays (FPGA) model applications in System Verilog Hardware Description Language at the University of Washington (2021-08-31, Verilog, 0KB, 下载0次)
在Basys3 FPGA开发板上使用Verilog编程语言实现经典Simon Game的硬件项目。，
A hardware project that implements the classic Simon Game using Verilog programming language on the Basys3 FPGA development board., (2023-08-25, Verilog, 0KB, 下载0次)
在Verilog中设计了一个数字信号处理器，以实现可编程无限脉冲响应（PIIR）滤波器。
Engineered a digital signal processor in Verilog to implement a Programmable Infinite Impulse Response (PIIR) filter. (2015-02-05, Verilog, 0KB, 下载0次)
使用Verilog和Basys3现场可编程门阵列（FPGA）套件设计和实现电子游戏。
Design and implementation of an electronic game using Verilog and the Basys3 Field Programmable Gate Array (FPGA) kit. (2022-02-01, Verilog, 4142KB, 下载0次)
“掌握数字电路设计的Verilog编程：RTL和测试台代码与HDL-BITS的实践”
"Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS" (2023-03-31, Verilog, 9598KB, 下载0次)
本程序是CPLD570T100的最小系统源代码，在Quartus软件上编程，实现点亮LED
This program is the smallest system source code of CPLD570T100, programmed on the Quartus software to realize the lighting of the LED (2021-04-06, Verilog, 62KB, 下载0次)
MIPS汇编程序和运行时模拟器。MARS是一个轻量级的交互式开发环境（IDE），用于使用MIPS汇编语言进行编程，旨在与Patterson和Hennessy的计算机组织和设计一起用于教育级别。
MIPS assembler and runtime simulator. MARS is a lightweight interactive development environment (IDE) for programming in MIPS assembly language and is designed to be used at the educational level together with the computer organization and design of Patterson and Hennessy. (2020-07-09, Verilog, 3888KB, 下载1次)
FPGA(现场可编程门阵列)与 CPLD(复杂可编程逻辑器件)都是可编程逻辑器件，它们是在PAL,GAL等逻辑器件的基础之上发展起来的。同以往的PAL,GAL等相比较，FPGA／CPLD的规模比较大，它可以替代几十甚至几千块通用IC芯片。这样的FPGA／CPLD实际上就是一个子系统部件。
本次EDA课程设计就是利用VerilogHDL来设计设计一个延迟器
FPGA (field programmable gate array) and CPLD (complex programmable logic device) are programmable logic devices. They are developed on the basis of pal, gal and other logic devices. Compared with pal and gal, FPGA / CPLD has a large scale and can replace dozens or even thousands of general IC chips. Such FPGA / CPLD is actually a subsystem component.
This EDA course design is to use Verilog HDL to design a delayer (2020-05-11, Verilog, 2KB, 下载0次)
FPGA(现场可编程门阵列)与 CPLD(复杂可编程逻辑器件)都是可编程逻辑器件，它们是在PAL,GAL等逻辑器件的基础之上发展起来的。同以往的PAL,GAL等相比较，FPGA／CPLD的规模比较大，它可以替代几十甚至几千块通用IC芯片。这样的FPGA／CPLD实际上就是一个子系统部件。
本次EDA课程设计就是利用VerilogHDL来设计设计一个4位加法器
FPGA (field programmable gate array) and CPLD (complex programmable logic device) are programmable logic devices. They are developed on the basis of pal, gal and other logic devices. Compared with pal and gal, FPGA / CPLD has a large scale and can replace dozens or even thousands of general IC chips. Such FPGA / CPLD is actually a subsystem component.
This EDA course design is to use Verilog HDL to design a 4-bit adder (2020-05-11, Verilog, 1KB, 下载0次)
FPGA(现场可编程门阵列)与 CPLD(复杂可编程逻辑器件)都是可编程逻辑器件，它们是在PAL,GAL等逻辑器件的基础之上发展起来的。同以往的PAL,GAL等相比较，FPGA／CPLD的规模比较大，它可以替代几十甚至几千块通用IC芯片。这样的FPGA／CPLD实际上就是一个子系统部件。
本次EDA课程设计就是利用VerilogHDL来设计设计一个自动售货机
FPGA (field programmable gate array) and CPLD (complex programmable logic device) are programmable logic devices. They are developed on the basis of pal, gal and other logic devices. Compared with pal and gal, FPGA / CPLD has a large scale and can replace dozens or even thousands of general IC chips. Such FPGA / CPLD is actually a subsystem component.
This EDA course design is to use Verilog HDL to design a vending machine (2020-05-11, Verilog, 1KB, 下载0次)
usb 源码以及USB相关的资料，可以帮助USB初学者更好的学习USB协议和编程
The USB source code and USB-related information can help USB beginners to learn USB protocol and programming better. (2019-05-05, Verilog, 4744KB, 下载5次)
非常好的verilog语言介绍学习工具，适和刚开始学习FPGA编程的同学。
Verilog Language Introduction Learning Tool, Suitable for students who have just begun to learn the programming of FPGA. (2018-12-20, Verilog, 1639KB, 下载11次)
基于FPGA的rs232串口编程 使用Verilog语音
FPGA based RS232 serial port programming using Verilog voice (2018-06-20, Verilog, 3KB, 下载6次)
使用Verilog 编程语言实现对11 bit 编码器SSI输出的读取
Use Verilog to read encoder,it's 11 bit and SSI output (2018-04-27, Verilog, 2KB, 下载22次)
fpga搭建sopc,驱动oled显示，用的是Verilog语言编程的
FPGA build SOPC, drive OLED display, using the Verilog programming language (2017-07-29, Verilog, 19KB, 下载11次)