这是一个数字钟的VHDL实现.采用八段数码管显示！
--可调闹铃，可校时。
This is a digital clock to achieve the VHDL. Using eight digital tube display!- Adjustable alarm can be school. (2008-06-26, VHDL, 5KB, 下载68次)
用VHDL语言编写的一个乘法器校程序
是基于BOOTH算法的
VHDL language using a multiplier BOOTH school program is based on the algorithm (2008-05-22, VHDL, 1KB, 下载25次)
本程序为模拟可校时的时钟程序；clk--时钟信号,rst--清零信号,set_en--校时 使能信号,faster--快进信号,slower--快退信号,hour--小时校时,min--分钟校 时,（hh,hl,ml,mh,sh,sl）--时，分，秒显示信号。 校时的时候，秒清零。 (2008-05-02, VHDL, 110KB, 下载2次)
http://www.pudn.com/Download/item/id/450976.html
学习使用FPGA做一些简单的编码器,RS(5,3)编码就是5个字符中有5-3=2两个校正字
Learning to use the FPGA to do a few simple encoders, RS (5,3) code is five characters in 5-3 = 2 has two correction words (2008-04-01, VHDL, 969KB, 下载136次)
VHDL数字钟
数字电子钟 此数字电子钟具有的功能包括： 1. 计时，时、分、秒显示； 2. 十二小时与二十四小时之间的转换； 3. 上下午显示； 4. 对时、分、秒的校时功能；
VHDL digital clock digital clock digital electronic clock with this function include: 1. Time, hours, minutes and seconds display 2. 12 hours and 24 hours between the conversion 3. On the afternoon show 4. hours, minutes and seconds of the school function (2007-11-14, PHP, 3KB, 下载135次)
基于Altera公司系列FPGA(Cyclone EP1C3T144C8)、Verilog HDL、MAX7219数码管显示芯片、4X4矩阵键盘、TDA2822功放芯片及扬声器等实现了《电子线路设计• 测试• 实验》课程中多功能数字钟实验所要求的所有功能和其它一些扩展功能。包括：基本功能——以数字形式显示时、分、秒的时间，小时计数器为同步24进制，可手动校时、校分；扩展功能——仿广播电台正点报时，任意时刻闹钟（选做），自动报整点时数（选做）；其它扩展功能——显示年月日（能处理大月小月，可手动任意设置年月日），秒表（包括开始、暂停和清零）。
based Altera FPGA series (Cyclone EP1C3T144C8) , Verilog HDL, MAX7219 Digital Display chips, 4x4 matrix keyboard, TDA2822 chip power amplifier and loudspeakers of the "Electronic Circuit Design (2007-04-17, Others, 23KB, 下载226次)
数字钟的主要功能有年月日时分秒的显示输出功能和对日期及时间进行设置的功能，还可以有整点报时等功能。设计数字钟的核心问题是时钟日期的自动转换功能。即自动识别不同月份的天数的控制。据此可以设计一个如图１所示结构的数字钟，该数字钟包括校时模块、时分秒计时模块、年月日模块、和输出选择模块。
digital clock is the main function Minutes date when the output function and the date and time set for the function , they can point the entire timekeeping functions. Digital Clock Design is the core issue date of the clock automatic conversion function. Automatic identification is the number of days in the control. One can design a structure as shown in figure 1 of the digital clock, the digital clock module, including school, a time when every minute module, Date module, and choose the output module. (2007-04-16, Delphi, 372KB, 下载59次)
这是我电子线路测试的作业，在FPGA板上实现数字钟，（Max2环境）采用VHDL语言编写，非常适合初学者。具备24小时计时，校时，低高音整点报时，定时和多重功能选择的功能。
This is my test of electronic circuits operating at the FPGA board digital clock (Max2 Environment) using VHDL language, very suitable for beginners. 24-hour time, the school, the whole point of low Treble timekeeping, the timing and choice of multiple functional function. (2007-01-31, MultiPlatform, 495KB, 下载26次)
使用Verilog语言编写的数字钟程序.有慢校时,快校时,闹钟等功能.
use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions. (2006-06-02, Unix_Linux, 5KB, 下载47次)
用Verilog DHL语言编写的一个数字钟程序,除了基本计数,还具有校时,闹钟功能
Verilog language used in the preparation of a digital clock procedures, in addition to the basic count, but also with school, an alarm clock (2005-12-10, MultiPlatform, 2KB, 下载709次)
数字电子钟 此数字电子钟具有的功能包括： 1. 计时，时、分、秒显示； 2. 十二小时与二十四小时之间的转换； 3. 上下午显示； 4. 对时、分、秒的校时功能； 5. 跑表功能。
digital electronic clock this digital electronic clock with functions include : 1. Time, hours, minutes and seconds display; 2. 12 hours with 24 hours of conversion; 3. On the afternoon show; 4. Right hours, minutes, and seconds school function; 5. Stopwatch functions . (2005-05-09, WORD, 7KB, 下载351次)