布尔诺理工大学VHDL课程
VHDL course at Brno University of Technology (2024-01-06, VHDL, 0KB, 下载0次)
Arty A7 100T FPGA开发板上的SoomRV
SoomRV on the Arty A7 100T FPGA dev board (2023-11-22, VHDL, 0KB, 下载0次)
在Arty A7-100T FPGA板上运行的简单risc-v CPU GPU
A simple risc-v CPU GPU running on an Arty A7-100T FPGA board (2021-06-30, SystemVerilog, 243KB, 下载0次)
用于优秀FPGA合成项目XFM2和XVA1的PCB。
PCBs for the excellent FPGA synth projects XFM2 and XVA1. (2022-04-17, C++, 4631KB, 下载0次)
用于Xilinx FPGA的Hastlayer硬件侧组件。有关详细信息，请参阅<https://hastlayer.com>。
用于Xilinx FPGA的Hastlayer硬件侧组件。有关详细信息，请参阅<https://hastlayer.com>。 (2022-10-09, VHDL, 751KB, 下载0次)
在Nexys 4 DDR Nexys A7 FPGA训练器上使用DDR2内存和MIG IP的示例
Example using DDR2 memory and MIG IP on the Nexys 4 DDR Nexys A7 FPGA Trainer (2022-06-07, Verilog, 5090KB, 下载0次)
njtech数字设计。基于Nexys A7 100T的fpga数字报警系统
njtech digital design. a fpga digital alarm system with Nexys A7 100T (2019-06-11, Verilog, 2613KB, 下载0次)
运行Debian Linux发行版的FPGA RISC-V SoC的Xilinx Vivado块设计
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro (2023-05-20, C, 3594KB, 下载0次)
GRLIB GPL支持Digilent CMOD A7 35T板
GRLIB GPL support for Digilent CMOD A7 35T board (2020-01-05, VHDL, 2651KB, 下载0次)
用于VHDL的GNSS代码和信号生成。GPS（L1 C A、L5）、伽利略（E1OS、E5）。包括Xilinx ISE测试台和wa...
GNSS codes and signal generation for VHDL. GPS (L1 C/A, L5), Galileo (E1OS, E5). Includes Xilinx ISE testbench and wave configuration files. (2018-01-03, VHDL, 88KB, 下载0次)
VHDL代码，用于生成GPS L1 C A和Galileo E1OS和E5 PRN以及无数据信号。不包括辅助代码。
VHDL codes to generate GPS L1 C A and Galileo E1OS and E5 PRNs and dataless signals. Secondary codes not included. (2019-02-22, VHDL, 782KB, 下载0次)
MRISC32 ISA的流水线有序标量VHDL实现
A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA (2023-03-30, VHDL, 293KB, 下载0次)
一种基于MRISC32-A1 CPU的计算机（FPGA SoC）
A computer (FPGA SoC) based on the MRISC32-A1 CPU (2023-03-30, VHDL, 385KB, 下载0次)
布尔诺理工大学VHDL课程
VHDL course at Brno University of Technology (2023-05-07, VHDL, 10263KB, 下载0次)
一个不同实现的小型FPGA和APSoC项目，用于测试SPI加速器的测量和活动事件...
A small FPGA and APSoC project of different implementations for testing Measurement and Activity Events of a SPI accelerometer. Refresh of fpga- serial-acl-tester-1 and -2. (2023-05-18, Tcl, 33681KB, 下载0次)
6502街机由UCSB IEEE
6502 Arcade Machine by UCSB IEEE (2022-02-13, JavaScript, 0KB, 下载0次)
在Nexys A7 100T FPGA上实现的高精度数字时钟，配有可调节的显示亮度和时间...
High accuracy digital clock implemented on a Nexys A7 100T FPGA complete with adjustable display brightness and time controls including reset, and time setting. (2021-04-30, HTML, 2277KB, 下载0次)
ZX Spectrum的端口Digilent Nexys A7-100T板的下一个核心。
Port of the ZX Spectrum Next core to the Digilent Nexys A7-100T board. (2022-03-16, VHDL, 113226KB, 下载0次)
自定义6502视频游戏控制台
Custom 6502 Video Game Console (2023-05-14, SystemVerilog, 9807KB, 下载0次)
这个项目的目的是模仿一个篮球记分板，有计时器和两个团队的得分。请参阅pi的自述文件...
Objective of this project was to emulate a Basketball score board, with timer and two teams scores. See readme for pic and more details. Release published v1.0.5 (2023-05-29, Verilog, 2216KB, 下载0次)